Electronics etc…

Posts

Jan 30, 2021
Colorlight i5 Extension Board Pin Mapping
Jan 22, 2021
Getting Started with ECP5 FPGAs on the Colorlight i5 FPGA Development Board
Jan 18, 2021
Optical S/PDIF Output PMOD
Dec 20, 2020
Design of a Multi-Stage PDM to PCM Decimation Pipeline
Dec 15, 2020
Half-Band Filters, a Workhorse of Decimation Filters
Nov 4, 2020
Cosimulating Verilog and VHDL with CXXRTL
Oct 26, 2020
Simulation Save/Restore Checkpointing with CXXRTL
Oct 17, 2020
From Microphone Datasheet to Filter Design Specification
Oct 11, 2020
Designing Generic FIR Filters with pyFDA and NumPy
Oct 4, 2020
PDM Microphones and Sigma-Delta A/D Conversion
Sep 30, 2020
An Intuitive Look at Moving Average and CIC Filters
Aug 8, 2020
CXXRTL, a Yosys Simulation Backend
Jul 11, 2020
Option Hacking the Tektronix TDS 420A
Jul 3, 2020
A Tektronix TDS 420A, a Serial Debug Console, a Symbol Table, and Ghidra
Jul 2, 2020
Extracting the Tektronix TDS 420A Firmware
Jun 27, 2020
Tektronix TDS 420A Remote Control over GPIB
Jun 27, 2020
In the Lab - Tektronix TDS 420A Oscilloscope
Jun 14, 2020
Reverse Engineering the Comtech AHA363 PCIe Gzip Accelerator Board
Jun 7, 2020
Making Sense of Test and Measurement Protocols
May 1, 2020
How I Write FSMs in RTL
Apr 10, 2020
Taking Apart a Smoke Detector
Feb 22, 2020
In The Lab - Soldering Prototypes with Enamel Magnet Wire
Dec 14, 2019
The Case of the Phantom Packets - A Formal Debugging Posterchild
Nov 21, 2019
Solderless PCB Assembly with Z-tape - It's not that You Should, but Maybe You Could?
Nov 11, 2019
Reverse Engineering the Cisco HWIC-3G-CDMA
Oct 13, 2019
WS2812B Reset Old & New
Oct 3, 2019
Project Mc2 Pixel Purse Teardown
Sep 15, 2019
Loading a Xilinx Spartan 6 bitstream with OpenOCD
Aug 3, 2019
Building Multiport Memories with Block RAMs
Aug 3, 2019
Video Timings Calculator
May 11, 2019
Setting Up an ADSB-Exchange Feeder
Mar 13, 2019
SweRV - An Annotated Deep Dive
Feb 5, 2019
VGA I2C Atari 2600 Joystick Expander - My First PCB
Jan 4, 2019
Under the hood of Formal Verification
Dec 6, 2018
The VexRiscV CPU - A New Way to Design
Dec 3, 2018
Pano Logic JTAG First Contact
Dec 2, 2018
Pano Logic G2 Disassembly
Dec 1, 2018
SpinalHDL Automated Operand Latency Matching
Nov 26, 2018
Racing the Beam Ray Tracer
Nov 22, 2018
Newsflash - Racing the Beam Ray Tracer"
Nov 19, 2018
A Bug-Free RISC-V Core without Simulation
Oct 14, 2018
SpinalHDL Snippets
Aug 12, 2018
Multipliers
Aug 12, 2018
Moving Away from Verilog - A First Look at SpinalHDL
Jul 10, 2018
Pano Logic Update: Audio Playback, USB and Ethernet Connections
Jun 4, 2018
Pano Logic Update: VGA, VexRiscV CPU, Text Mode
May 11, 2018
Pano Logic G1: Works Have Started
May 4, 2018
JTAG for FPGAs - Part 1: JTAG_GPIO
Apr 30, 2018
In the lab: Bausch and Lomb StereoZoom 4 with Phone Adapter
Apr 29, 2018
Micro Chip R/W Clip Review
Apr 23, 2018
eeColor Color3: HDMI RX to HDMI TX is UP!!!
Apr 22, 2018
eeColor Color3: SiI9233 and SiI9136 I2C Traces
Apr 18, 2018
Terasic vs Cheap Clone USB Blaster
Apr 15, 2018
eeColor Color3: HDMI TX is Up!
Apr 15, 2018
Pano Logic: Acquisition of the Goods!
Apr 11, 2018
Dirt Cheap USB Blaster Clones Considered Harmful
Apr 11, 2018
eeColor Color3: SiI9136 and SiI9233 Connections to FPGA
Apr 9, 2018
eeColor Color3: Getting Ready for Reverse Engineering
Apr 8, 2018
Hacking the eeColor Color3
Apr 8, 2018
Altera Quartus Install on Ubuntu 16.04
Mar 24, 2018
Debugging My First STM32 Program on the BlackIce-II Board
Mar 23, 2018
Connecting GDB to the BlackIce-II STM32L433 with the Black Magic Probe
Mar 22, 2018
STLink v2 + STM32F103C8T6 Blue Pill Board + STM32L4xxx Debug